Low-current oscillator with hysteresis input buffer

Details Low-current oscillator with hysteresis input buffer Low-current oscillator with hysteresis input buffer

1999-02-25

2001-08-21

Kinkead, Arnold (Department: 2817)

Oscillators

Combined with particular output coupling network

C331S1160FE, C331S1160FE, C331S158000, C327S205000

Reexamination Certificate

active

06278336

ABSTRACT:

BACKGROUND AND SUMMARY OF THE INVENTION
This patent relates to crystal-stabilized integrated circuit oscillator circuits.
BACKGROUND
Crystal Oscillators
Crystal-controlled oscillators use the high Q of an electromechanical resonator (a quartz crystal) to stabilize an integrated oscillating circuit at a desired frequency. Such circuits can achieve a frequency stability in the parts-per-million range, and there is no other practical way to achieve such a constant frequency reference in an integrated circuit. Crystal-controlled oscillators are therefore extremely important, and likely to remain so.
Crystal-controlled oscillators pose some difficulties in design, and one of these is start-up. The impedance of the crystal is typically much higher at zero-current conditions (which are necessarily present at start-up), so in some implementations the initial loop gain is not enough to start the oscillator. A variety of start-up circuits have therefore been proposed; see e.g. B. Parzen, Design of Crystal and Other Harmonic Oscillators (1983), at page 415; Unkrich et al., “Conditions for Start-Up in Crystal Oscillators,” 17
IEEE J. Solid
-
State Circuits
87 (1982).
Other difficulties are present in the specific context of low-power CMOS oscillator implementations. Many portable applications are designed for low operating voltage and low power consumption, but also require the frequency stability of a crystal oscillator. To reduce power consumption, such low-power CMOS oscillator circuits are typically operated in the weak inversion regime (where gate voltages are only slightly greater than the threshold voltage). However, in the weak inversion regime the gain tends to be lower, and thus start-up is a particularly critical problem. See e.g. U.S. Pat. No. 5,546,055, which is hereby incorporated by reference.
Low-Current Oscillator With Input Buffer Hysteresis
The present application discloses an oscillator circuit which includes hysteresis in the differential input comparator to delay the production of clock pulses until a certain peak-to-peak voltage level is detected on the oscillator pins. The hysteresis component buffers the signal from noise presented at the oscillator pins. The hysteresis buffer design incorporates the same basic functional architecture of a differential comparator, but uses switched resistors in the differential inputs to create voltage offset. Hysteresis is created by switching-in the resistors on opposite phases of the clock to create offset in one comparator input at a time.
An advantage of the disclosed methods and structure is that noise immunity is significantly improved. Another advantage is that the hysteresis circuit is initiated during oscillator start-up, and not later as in prior-art designs. Another advantage is that the circuit offers an additional level of design control during start-up.


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