Computer graphics processing and selective visual display system – Plural physical display element control system – Display elements arranged in matrix
Reexamination Certificate
1998-05-01
2001-09-18
Wu, Xiao (Department: 2774)
Computer graphics processing and selective visual display system
Plural physical display element control system
Display elements arranged in matrix
C345S063000, C345S182000
Reexamination Certificate
active
06292159
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method for driving an AC-type plasma display panel (hereinafter referred to as an AC-PDP), more particularly, a surface-discharge type AC-PDP.
2. Description of the Background Art
As is well known, plasma display panels have two sheets of glass and small discharge cells (pixels) arranged therebetween, which are studied in various ways as thin-type television or display monitors. Known plasma display panels include AC-type plasma display panels (AC-PDPs) having a memory function. The AC-PDPs include surface-discharge type AC-PDPs.
FIG. 38
is a perspective view showing the structure of a surface-discharge type AC-PDP. Japanese Patent Aplication No. 7-140922 and Japanese Patent Aplication No. 7-287548, for example, show surface-discharge type AC-PDPs having structure like this. In the diagram, the surface-discharge type plasma display panel
1
includes a front glass substrate
2
serving as a display face, a rear glass substrate
3
provided opposite to the front glass substrate
2
with a discharge space interposed therebetween, first row electrodes
4
(X
1
-Xn) and second row electrodes
5
(Y
1
-Yn) formed in pairs on the front glass substrate, a dielectric layer
6
covering the first and second row electrodes
4
and
5
, an MgO (magnesium oxide) layer
7
formed on the dielectric layer
6
by deposition or the like, column electrodes
8
(W
1
-Wm) formed perpendicular to the first and second row electrodes
4
and
5
on the rear glass substrate
3
, phosphor layers
9
formed over the column electrodes
8
in order like stripes to emit red, green, and blue lights for the respective column electrodes
8
, and partitions
10
formed between the column electrodes
8
,
8
to separate the discharge cells and also to prevent the PDP from being broken by atmospheric pressure. The space between the glass substrates
2
and
3
is filled with a discharge gas, such as an Ne—Xe mixture gas or an He—Xe mixture gas, at a pressure not higher than atmospheric pressure. The discharge cells serving as pixels are formed at intersections of the pairs of the row electrodes
4
,
5
and the column electrodes
8
perpendicular to the row electrodes
4
,
5
. Hereinafter the first row electrodes may be referred to as X electrodes, the second row electrodes as Y electrodes, and the column electrodes as W electrodes.
Next, its operation will be described. Voltage pulses are alternately applied between the first row electrodes
4
and the second row electrodes
5
to cause discharge with its polarity inverted for each half cycle to cause the cells to emit light. In color display, the phosphor layers
9
formed in the individual cells are excited by ultraviolet rays generated by the discharge and emit light. The first row electrodes
4
and the second row electrodes
5
that discharge for display are covered with the dielectric layer
6
. Accordingly, once discharge occurs between the electrodes in cells, electrons and ions produced in the discharge space move in the direction of the applied voltage, and are accumulated on the dielectric layer
6
. The charge of the electrons and ions accumulated on the dielectric layer are called wall charge. The electric field formed by the wall charge acts to weaken the applied electric field, and the discharge therefore rapidly disappears as the wall charge forms. After the discharge has disappeared, electric field having reverse polarity to that of the preceding discharge is applied, and then the electric field formed by wall charge and the applied electric field overlap, which allows discharge to occur at lower voltage than the preceding discharge. Subsequently, this lower voltage is inverted for each half cycle to sustain the discharge. The AC-PDP originally has this function, which is called a memory function. The discharge sustained at lower voltage with the aid of the memory function is called discharge sustain, and the voltage pulses applied to the first row electrodes
4
and the second row electrodes
5
for each half cycle are called sustain pulses. This discharge sustain lasts until the wall charge disappears, as long as the sustain pulses are applied. Eliminating the wall charge is called erasing and forming the wall charge on the dielectric layer in the first place is called writing.
Next, tonal display by the AC-PDP will be described briefly.
FIG. 39
is a diagram showing the structure of one field in tonal display shown in Japanese Patent Aplication No. 7-160218, for example. One field is a time for output of one complete screen of picture, which is about 16.7 mS (60 Hz) in NTSC. In the drawing, the display lines correspond to the lines formed of the first and second row electrodes in the row direction in the AC-PDP. The lateral direction in the drawing shows passage of time. One field includes some subfields, and each of the subfields includes a reset period, an address period, and a discharge sustain period. For example, in display with 256 tones, one field includes eight subfields having respective discharge sustain periods with proportions of powers of 2, such as 1, 2, 4, 8, 16, 32, 64, 128. Although the entirety of one field shown in
FIG. 39
is utilized as reset periods, address periods and discharge sustain periods, these periods may be uniformly distributed in one field with another type of periods, or may be compressed somewhere in one field.
FIG. 40
shows voltage waveforms in one subfield in the conventional method for driving a plasma display panel shown in Japanese Patent Aplication No. 7-160218, for example. In this conventional example, the first row electrodes X are connected in common, so that the same voltage is applied to all the first row electrodes X. The second row electrodes Y and the column electrodes W allow separate application of voltages to the individual lines.
FIG. 40
shows voltage waveforms to a column electrode Wj, the first row electrodes X, and the second row electrodes Y
1
, Y
2
, Yn, from the top.
First, the reset period is a period for bringing all cells in the AC-type plasma display into the same state, in which an entire-face write pulse Pxp (priming pulse) is applied to the first row electrodes X connected in common in the entire screen at time “ta” at the beginning of the reset period in FIG.
40
. This entire-face write pulse Pxp is set equal to or higher than the discharge starting voltage between the first row electrodes X and the second row electrodes Y so that all cells discharge and emit light independently of whether they emitted light or not in the preceding subfield. At this time, a voltage pulse is applied also to the column electrodes W to reduce potential difference between the X and W electrodes so that discharge will not readily occur between the first row electrodes X and the column electrodes W, which is approximately set at half of the voltage between the X and Y electrodes. It is not essential to apply this pulse. The application of the entire-face write pulse Pxp between the X and Y electrodes causes strong discharge between X and Y, so that a large amount of wall charge is accumulated between the X and Y electrodes, and the discharge ends. Next, at time “tb” in
FIG. 40
, the entire-face write pulse Pxp falls. When the voltage disappears between the first row electrodes X and the second row electrodes Y, the electric field by the wall charge accumulated by the entire-face write pulse Pxp is left between the X and Y electrodes. This electric field is so large as to start discharge by itself, and thus discharge takes place again between the X-Y electrodes. However, since no external voltage is applied, electrons and ions caused in this discharge are neutralized and disappear, without being attracted to the row electrodes X and Y. Thus, it is possible to bring all cells into a state with no wall charge for reset, by writing and erasing all cells independently of presence/absence of wall charge in the preceding subfield. The discharge caused by the accumulated wall charge without application of ex
Hashimoto Takashi
Okuno Yoshiaki
Ono Yoshiki
Someya Jun
Mitsubishi Denki & Kabushiki Kaisha
Wu Xiao
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