Non-linear digital-to-analog converter

Coded data generation or conversion – Analog to or from digital conversion – Digital to analog conversion

Reexamination Certificate

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Details

C341S154000, C341S138000

Reexamination Certificate

active

06181265

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a digital-to-analog converter, and more particularly, to a non-linear digital-to-analog converter which realizes non-linear output with overlapped resistor string.
2. Discussion of the Related Art
Generally, industrial systems and controllers have trends to digitalization with the spread of CPUs having fast speed in an analog circuit at suitable cost. Most of industrial systems and controllers share digital mode with analog mode. In this respect, for signal transmission between digital mode and analog mode, an analog-to-digital converter or a digital-to-analog converter is required.
An analog-to-digital converter is used in the field of instrumentation and control. With the development of microcomputers, parts processed by analog mode have been processed by converting an analog signal to a digital signal using the analog-to-digital converter. For this reason, reliability and efficiency of applied products have improved.
A background art digital-to-analog converter will be described with reference to the accompanying drawings.
FIGS. 1
a
and
1
b
are schematic diagrams illustrating a background art digital-to-analog converter.
As shown in
FIG. 1
a,
the background art digital-to-analog converter includes a primary resistor string
1
, most significant bit (MSB) switching block
2
, least significant bit (LSB) switching block
3
, a secondary resistor string
4
, and LSB output switching portion
5
.
Two voltages formed in succession between V
2
and V
1
are applied between M
1
~M
7
of the primary resistor string
1
using the MSB switching block
2
and the LSB switching block
3
. One voltage is output through the LSB output switching portion
5
.
As shown in
FIG. 1
b,
the background art digital-to-analog converter includes a primary resistor string
6
consisting of Ra
1
~Ra
2
N/2
−1, a first switching block
7
consisting of Sa
1
−Sa
2
N/2
1, a secondary resistor string
8
consisting of Rb
1
~Rb
2
N/2
−1, a second switching block
9
consisting of Sb
1
~Sb
2
N/2
−1, a cubic resistor string
10
consisting of Rc
1
~Rc
2
N/2
−1, and a third switching block
11
consisting of Sc
1
~Sc
2
N/2
−1.
In the aforementioned digital-to-analog converter, resistor ratio of Ra, Rb and Rc is 2
N/2
:2
N/2
:1 and a total of resistor string selected by the MSB plus resistor string selected by the LSB is 2
the number of MSB
*2
N/2
of Rc.
In other words, among 6 bits, when high 3 bits are the MSB and low 3 bits are the LSB, Ra is 2*2
3
times (8−101
(2)
−1) of Rc in case of 101010
(2)
. At this time, Rb is 5*2
3
times (101
(2)
). Since Rc is always 2
3
, total resistor value is 8*2
3
times (2
3
*2
3
).
If the value of 010
(2)
is selected by Sc of the third switching block
11
, it is possible to wholly select the value of 101010
(2)
.
The aforementioned background art digital-to-analog converter has several problems.
First, since the secondary resistor string is always fixed at a uniform value, it can be applied to the digital-to-analog converter which outputs linear value. However, it cannot be used in apparatuses which require non-linear value. In addition, the resistor value may be greater than a desired resistor value due to on-resistor constituting each switching block. This causes incorrect conversion value.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a non-linear digital-to-analog converter that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a non-linear digital-to-analog converter which realizes non-linear output with overlapped resistor string.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, a non-linear digital-to-analog converter according to the present invention includes a first reference voltage select switching portion for selectively outputting first and second reference voltages Vh
1
and Vc
1
from externally applied reference voltages Vref[1, . . . 2
N/2
] and third and fourth reference voltages Vh
2
and Vc
2
from externally applied reference voltages Vref[0, . . . 2
N/2
−1] if N bit digital value is input, a resistor string block for outputting Vh[0, . . . 2
N/2
−1] number of level voltages, Vc[0, . . . 2
N/2
−1] number of level voltages, and V
1
[0, . . . 2
N/2
−1] number of level voltages from any one of the reference voltages Vh
1
and Vc
1
and any one of the reference voltages Vh
2
and Vc
2
, a second reference voltage select switching portion for outputting a first analog conversion voltage V
1
from the Vh[0, . . . 2
N/2
−1] number of level voltages, a second analog conversion voltage V
2
from the Vc[0, . . . 2
N/2
−1) number of level voltages, and a third analog conversion voltage V
3
from the V
1
[0, . . . 2
N/2
−1] number of level voltages, and an output switching portion for selectively outputting any one of the first, second and third analog conversion voltages V
1
, V
2
and V
3
.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.


REFERENCES:
patent: 4918448 (1990-04-01), Hauviller et al.
patent: 5059978 (1991-10-01), Valdenaire
patent: 5495245 (1996-02-01), Ashe
patent: 5648780 (1997-07-01), Neidorff
patent: 5999115 (1999-12-01), Connell et al.

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