Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices
Reexamination Certificate
1999-07-16
2001-08-28
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Making plural separate devices
C438S118000, C438S123000, C438S108000, C438S126000
Reexamination Certificate
active
06281044
ABSTRACT:
FIELD OF THE INVENTION
This invention relates generally to semiconductor manufacture, and specifically to an improved method and system for fabricating semiconductor components.
BACKGROUND OF THE INVENTION
Semiconductor dice are used to construct various semiconductor components, such as semiconductor packages and multi chip modules. These semiconductor components typically include a substrate on which bare semiconductor dice are mounted. For example, conventional plastic semiconductor packages can include substrates in the form of metal leadframes. During a packaging process the bare dice are attached and electrically connected to the leadframes, and then encapsulated in a plastic resin.
Besides leadframes, other types of substrates are used to construct semiconductor components. For example, other types of semiconductor packages, such as “BGA packages” and “chip scale packages”, include substrates which can comprise a glass filled plastic, such as FR-4, or FR-5, or in some cases silicon, or ceramic. Multi chip modules and circuit boards, can also include plastic, silicon, or ceramic substrates, on which semiconductor dice, as well as other electronic components, are mounted.
During fabrication of a semiconductor component the dice are attached to the substrate. One method for attaching the dice to the substrate is by forming an adhesive layer between the dice and the substrate. For example, die attach adhesives, such as epoxy and silicone, can be used to back bond dice to substrates. Typically, the adhesive is dispensed in viscous form from a pressurized nozzle, and then cured to harden. However, for some applications it is not practical to use an adhesive because the viscous material may undesirably adhere to the surfaces of bond pads, and other electrical elements on the die or substrate, and adversely affect the electrical characteristics of the component. Also for some applications, it may not be possible to uniformly form the adhesive layer with a required planarity and geometrical configuration.
Another technique for attaching dice to lead frame substrates employs adhesive tape. For example, during fabrication of a lead-on-chip semiconductor package, semiconductor dice are attached to a metal leadframe using double sided adhesive decals. With a typical lead-on-chip fabrication process the decals are punched with a required peripheral configuration from a length of tape. Portions of the tape that do not become part of the decal are then discarded.
While adhesive tape has been used successfully in the manufacture of plastic semiconductor packages constructed with metal lead frames, it has typically not been used in the volume manufacture of other types of semiconductor components. The present invention is directed to a method and system for fabricating various types of semiconductor components using adhesive tape to attach one or more semiconductor dice to a substrate. In addition, the present invention makes decals without wasted tape, and with accurate alignment of the decal, the substrate, and the die to one another.
SUMMARY OF THE INVENTION
In accordance with the present invention, an improved method and system for fabricating semiconductor components, such as packages, multi chip modules, and printed circuit boards, are provided.
In a first embodiment the method is used to fabricate a BGA package. The BGA package includes a substrate, a semiconductor die attached to the substrate, and one or more adhesive decals attaching the die to the substrate. In this embodiment the substrate comprises an organic polymer such as bismaleimide-triazine, epoxy or polyimide, reinforced with glass fibers. The substrate is provided as a strip of material, on which multiple BGA packages are formed, and then singulated by cutting or shearing.
The method uses one or more continuous ribbons of tape which are cut into decals, and then applied to required areas of the substrate. The tape can comprise a double-sided, multi-layered adhesive tape, such as polyimide film coated on both sides with an adhesive, or alternately a single layer of adhesive material configured as tape. The decals are cut and applied to the substrate by indexing lengths of the tape into guide openings, aligning the substrate to the openings, and then moving cutters through the guide openings to cut and place the decals on the substrate. A finished dimension (e.g., width) of each decal is the same as a width of the tape. Another finished dimension (e.g., length) of each decal is controlled by cutting an indexed length of the tape. Using this method there is no wasted tape. In addition, there are only two cut edges per decal, and only one cut is required for each index of the tape and substrate.
A system for performing the method of the invention includes the substrate, the die, and a tape cutting apparatus configured to cut, and apply, the decals to the substrate. The system also includes a substrate handling apparatus configured to align the substrate during cutting and applying of the decals.
The tape cutting apparatus includes: a support frame for rotatably mounting one or more reels of adhesive tape of a desired width; a tape guide for guiding continuous ribbons of tape from the reels into guide openings for cutting; a pair of feed rollers for continuously feeding and indexing the ribbons of tape into the guide openings; and a cutter assembly adapted to move through the guide openings to cut the decals from the ribbons of tape held in the guide openings, and to apply the decals in a desired pattern to a die mounting area of the substrate.
The substrate is positioned proximate to the guide openings of the cutter assembly by the substrate handling apparatus. The substrate handling apparatus also indexes the substrate to align selected die mounting areas on the substrate to the cutter assembly for application of the cut decals.
In a second embodiment the method is used to fabricate a chip scale package comprising a substrate, a semiconductor die attached to the substrate, and one or more cut decals attaching the die to the substrate. In this embodiment the substrate is provided as a silicon, ceramic or plastic panel on which multiple chip scale packages are formed, and then singulated. In a third embodiment the method is used to fabricate a multi chip module, or a printed circuit board, comprising a substrate on which multiple semiconductor dice are attached using cut decals.
REFERENCES:
patent: 4118858 (1978-10-01), Taylor et al.
patent: 4141075 (1979-02-01), Taylor, Jr. et al.
patent: 4193834 (1980-03-01), Bernardi
patent: 4279682 (1981-07-01), Hamagami et al.
patent: 4649415 (1987-03-01), Herbert
patent: 4839227 (1989-06-01), Hoopman
patent: 4862245 (1989-08-01), Pashby et al.
patent: 4916036 (1990-04-01), Chieky
patent: 4916519 (1990-04-01), Ward
patent: 4985105 (1991-01-01), Masuda
patent: 4994411 (1991-02-01), Naito et al.
patent: 5087494 (1992-02-01), Calhoun
patent: 5278101 (1994-01-01), Ikenoue
patent: 5285105 (1994-02-01), Cain
patent: 5286679 (1994-02-01), Farnworth et al.
patent: 5432127 (1995-07-01), Lamson et al.
patent: 5432380 (1995-07-01), Jin et al.
patent: 5455200 (1995-10-01), Bigler et al.
patent: 5548160 (1996-08-01), Corbett et al.
patent: 5696033 (1997-12-01), Kinsman
patent: 5789803 (1998-08-01), Kinsman
patent: 5946553 (1999-08-01), Wood et al.
patent: 5990566 (1999-11-01), Farnworth et al.
patent: 6002165 (1999-12-01), Kinsman
patent: 6012502 (2000-01-01), VanNortwick et al.
patent: 6013948 (2000-01-01), Akram et al.
patent: 6020629 (2000-02-01), Farnworth et al.
patent: 6025212 (2000-02-01), VanNortwick et al.
patent: 6028354 (2000-02-01), Hoffman
patent: 6048755 (2000-04-01), Jiang et al.
patent: 6049125 (2000-04-01), Brooks et al.
patent: 6057597 (2000-05-01), Farnworth et al.
patent: 6097087 (2000-08-01), Farnworth et al.
patent: 6133522 (2000-10-01), Kataoka et al.
patent: 2 278 497 (1994-11-01), None
patent: 2 288 909 (1995-01-01), None
patent: 51-067932 (1976-06-01), None
patent: 57147568 (1981-03-01), None
patent: 57-139162 (1982-08-01), None
patent: 59101330 (1982-12-01), None
pat
Bowers Charles
Gratton Stephen A.
Micro)n Technology, Inc.
Schillinger Laura
LandOfFree
Method and system for fabricating semiconductor components does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method and system for fabricating semiconductor components, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method and system for fabricating semiconductor components will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2463683