Television – Camera – system and detail – Solid-state image sensor
Reexamination Certificate
1996-11-27
2001-03-13
Garber, Wendy (Department: 2712)
Television
Camera, system and detail
Solid-state image sensor
C348S310000, C348S315000, C250S208100
Reexamination Certificate
active
06201573
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a solid-state imaging apparatus for imaging a two-dimensional optical image input thereto.
2. Related Background Art
The imaging apparatus employing a solid-state image sensor represented by a charge coupled device ( hereinafter referred to as a CCD ) has been used in various kinds of fields including household videos. However, the CCD has a low charge transfer efficiency. When charges stored in photo diodes occupying comparatively a large light receiving area are handled to be transferred, they are not transferred completely. For such reason, in the specified field, among the solid-state imaging apparatuses, MOS type image sensors have been preferably employed which produce no problem on the charge transfer efficiency.
Among the MOS type image sensors, the ones for imaging two-dimensional optical images have heretofore adopted the system wherein a single discrete amplifier is provided for a photo diode array having a plurality of two-dimensionally arranged photo diodes, a light detection signal is fetched from each photo diode after it has been amplified by the amplifier. Recent years, the proposals to mount both of a reading-out circuit and a light detection circuit on the same chip and to modify a system of circuit structure have been made, in order to increase an S/N ratio for the light detection signal and to miniaturize the apparatus while utilizing the merits of the MOS image sensors.
Such representative example of the proposals is the solid-state imaging apparatus disclosed in Japanese Patent Application Laid Open Heisei 4-3588.
FIG. 1
is a circuit diagram of this solid-state imaging apparatus. As shown in
FIG. 1
, the apparatus comprises (a) a light receiving unit
930
consisting of an N
2
number of vertical light receiving sections
920
arranged in a horizontal direction, each of which is connected to common output lines and is provided with an N
1
number of light receiving devices
910
arranged in a vertical direction, each of light receiving devices being composed of a photoelectric conversion element
912
and a switching element
912
; (b) integration circuits
940
, each being arranged for corresponding one of the vertical light receiving sections
920
to integrate the output therefrom and having a charge amplifier
941
; (c) sample-and-hold circuits
950
, each sampling/holding the signal from corresponding one of the integration circuits
940
; (d) switching circuit
960
, each controlling the output
on-output of the signal from corresponding one of the sample-and-hold circuits
950
to the outside; (e) a vertical shift-register
971
for instructing to determine the light receiving device
910
to read out the light detection result for the vertical direction; and (f) a horizontal shift-register
972
for instructing to determine the light receiving device
910
to read out the light detection result for the horizontal direction.
With such constitution, a light detection signal in accordance with a light intensity detected by each light receiving device is output through a video signal wiring
980
, and the impedance conversion is conducted by buffer circuits
990
.
SUMMARY OF THE INVENTION
The object of the present invention is to provide a solid-state imaging apparatus which is capable of imaging images with a high SN ratio (S/N).
A solid-state imaging apparatus of a first aspect of the present invention which images up a two-dimensional optical image comprises, (a) a light receiving unit composed of a first number of vertical light receiving sections arranged along a first direction, each of which consists of a second number of light receiving devices arranged in a second direction, each light receiving device is composed of a photoelectric conversion element for converting an input optical signal to a current signal and a switching element having a first terminal connected to a signal output terminal of said photoelectric conversion element and a second terminal to provide charges generated by the photoelectric conversion element in response to a vertical scanning signal, each of said vertical light receiving sections having a signal output terminal electrically connected to the second terminal of said switching element; (b) a first number of integration circuits for receiving individually the output signal from the corresponding vertical light receiving section, each of which enables, in response to a reset instruction signal, a variable capacitor section either to perform an integration for the current signal output from corresponding one of said vertical light receiving section or not to perform the integration for the current signal, the variable capacitor section being connected between input and output terminals of a current amplifier and varying a capacitance value in response to a capacitance instruction signal; (c) the first number of comparing circuits for comparing an integration signal output from each integration circuit with a reference value to output a comparing result; (d) the first number of capacitance control sections which receive a comparing result signal from each comparing circuit to output a capacitance instruction signal for informing to a variable capacitance in accordance with a value of the comparing result signal, and which outputs a first digital signal in response to the capacitance instruction signal when it is judged, from the comparing result signal, that a value of the integration signal agrees with the reference value at a predetermined resolution; and (e) the first number of horizontal reading-out sections, each receiving the first digital signal from corresponding one of the capacitance control sections, and outputting a second digital signal in response to a horizontal scanning signal.
Here, it is preferable that the values of the first and second digital signals should equal each other for simplicity of the circuit constitution.
Furthermore, the horizontal reading-out section may be further provided with a data conversion section for receiving the first digital signal output from the capacitance control section and for outputting the second digital signal by data conversion. Here, the data conversion can be applied to the offset cancel. Moreover, the data conversion section may be provided with a read-only memory device which receives the first digital signal in its address input terminal, performs data conversion based on data written to its memory section, and outputs the second digital signal from a data output terminal.
A solid-state imaging apparatus of a second aspect of the present invention which images up a two-dimensional optical image comprises, (a) a light receiving unit composed of a first number of vertical light receiving sections arranged along a first direction, each of which consists of light receiving devices arranged in a second direction, each light receiving device is composed of a photoelectric conversion element for converting a input optical signal to a current signal and a switching element having a first terminal connected to a signal output terminal of the photoelectric conversion element and a second terminal to provide charges generated by the photoelectric conversion element in response to a vertical scanning signal, each of said vertical light receiving sections having a signal output terminal electrically connected to the second terminal of said switching element; (b) a first number of integration circuits for receiving individually the output signal from the corresponding vertical light receiving section, each of which integration circuits enables, in response to a reset instruction signal, a variable capacitor section either to perform an integration for the current signal output from each vertical light receiving section or not to perform the integration for the current signal, the variable capacitor section being connected between input and output terminals of a charge amplifier and varying a capacitance value in response to a capacitance instruction signal; (c) the first number of
Garber Wendy
Hamamatsu Photonics K. K.
Pillsbury Madison & Sutro LLP
Vu Ngoc-Yen
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