Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive...
Reexamination Certificate
1997-12-18
2001-04-10
Bowers, Charles (Department: 2823)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
C438S424000, C438S296000
Reexamination Certificate
active
06214690
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to semiconductor devices, and particularly, to semiconductor devices having integrated gate electrode and isolation region formation.
BACKGROUND OF THE INVENTION
Over the last few decades, the electronics industry has undergone a revolution by the use of semiconductor technology to fabricate small, highly integrated electronic devices. The most common semiconductor technology presently used is silicon-based. A large variety of semiconductor devices have been manufactured having various applications in numerous disciplines. Such silicon-based semiconductor devices often include metal-oxide-semiconductor (MOS) transistors, complimentary MOS (CMOS) transistors, bipolar transistors, BiCMOS transistors, etc.
Each of these semiconductor devices generally include a semiconductor substrate on which a number of active devices are formed. The particular structure of a given active device can vary between transistors. For example, in MOS transistors, an active device generally includes source and drain regions and a gate electrode which modulates current between the source and drain regions. In bipolar transistors, an active device generally includes a base, and collector, and an emitter.
A typical semiconductor device containing a large number of transistors. As is well known, numerous process steps are carried out in the fabrication of a semiconductor device. Each of these steps adds to the cost of the final product by increasing the fabrication time and complexity and by increasing the cost of materials. Take the formation of isolation regions for example. Conventional semiconductor manufacturing processes involve the formation of isolation regions prior to the formation of the transistor structures, such as gate electrodes.
One known technique for isolating active devices on a semiconductor substrate is LOCOS (for LOCal Oxidation of Silicon) isolation. LOCOS isolation generally involves the formation of a recessed or semi-recessed oxide in the nonactive (or field) areas of the substrate which will be used to separate active devices. In a typical LOCOS process, a thin silicon dioxide layer, often referred to as a pad oxide layer is grown on the surface of semiconductor substrate. A relatively thick layer of silicon nitride is then deposited over the pad oxide layer. Using a mask and etch process, the pad oxide
itride layers are then selectively removed to define active regions (generally those regions masked by the pad oxide
itride layers) where transistors will be formed and field regions (generally those regions over which the pad oxide
itride layers have been removed). The nitride layer acts as a mask during subsequent oxide growth. An oxide, typically referred to as a field oxide, is thermally grown in the field regions to a thickness ranging from 0.3 to 1.0 &mgr;m to electrically isolate the active regions. The pad oxide layer and nitride masking layer are then removed to expose the active regions of the substrate. Further processing steps are then carried out to form active devices in the active regions.
One alternative to LOCOS isolation is trench isolation. Trench isolation generally involves forming a patterned nitride mask over the substrate to define active regions where transistors will be formed and field regions, etching trenches in field regions of the substrates, oxidizing the trenches and filling the trenches with a deposited silicon dioxide layer, which is typically etched back to yield a relatively planar surface. Each of these steps, however, adds to the overall cost and time to manufacture a semiconductor device.
SUMMARY OF THE INVENTION
The present invention generally provides a semiconductor device and fabrication process in which gate electrode formation is integrated with the formation of isolation regions.
Consistent with one embodiment of the invention, the semiconductor device is formed by forming at least two adjacent gate electrode stacks of the substrate. A layer of dielectric material is formed over regions of the substrate between the two adjacent gate electrode stacks and portions of the dielectric material layer are selectively removed to leave an isolation block of the dielectric material between the two adjacent gate electrode stacks. The gate electrode stacks may, for example, have a thickness ranging from about 2,500 to 6,000 Å. In accordance with one aspect of the invention, active regions are formed in the substrate between the isolation block and at least one of the gate electrode stacks.
The above summary of the p resent invention is not intended to describe each illustrated embodiment or every implementation of the present invention. The figures and the detailed description which follow more particularly exemplify these embodiments.
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Gardner Mark I.
Gilmer Mark C.
Advanced Micro Devices , Inc.
Bowers Charles
Brewster William M.
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