Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices
Patent
1996-07-05
1998-10-20
Niebling, John
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Making plural separate devices
438124, H01L 2128
Patent
active
058245685
ABSTRACT:
A composite containing an integrated circuit chip having conductive site thereon and electrically conductive leads that are interconnected to the conductive site by electrically conductive wire; wherein the wire is coated with a dielectric material. Also, a method for fabricating the composite is provided.
REFERENCES:
patent: 3331125 (1967-07-01), McCusker
patent: 3449641 (1969-06-01), Lee
patent: 3566208 (1971-02-01), Wang
patent: 3826244 (1974-07-01), Saleman et al.
patent: 4005472 (1977-01-01), Harris et al.
patent: 4173664 (1979-11-01), Cioloszyk
patent: 4323914 (1982-04-01), Berndlmaier et al.
patent: 4401053 (1983-08-01), Riley
patent: 4486945 (1984-12-01), Aigoo
patent: 4581291 (1986-04-01), Bongianni
patent: 4945856 (1990-08-01), Stewart
patent: 5016084 (1991-05-01), Nakao
patent: 5045151 (1991-09-01), Edell
patent: 5323533 (1994-06-01), Val
patent: 5404265 (1995-04-01), Moresco et al.
patent: 5622898 (1997-04-01), Zechman
Whittington et al, "Internal Conformal Coatings for Microcircuits", IEEE Transactions on Components, Hybrids, Manufacturing Technology, vol. CHMT-1, No. 4, pp. 416-422, Dec. 1978.
IBM Technical Disclosure Bulletin, vol. 34, No. 2 (1991) Module Protection, C4 Life Extension and Chip Reworkability Using Parylene.
IBM Technical Disclosure Bulletin, vol. 20, No. 11B (1978) Electronic Packaging Structure.
IBM Technical Disclosure Bulletin, vol. 15, No. 6 (1972) Packaging of Integrated Circuits.
Noriaki, Package of Semiconductor Integrated Circuit Device, Abstract of Japan, vol. 013, No. 594 (1989) and JP-A-01 248 547 (NEC Corp) (1989).
Sukeyuki, Bonding Wire for Semiconductor Device, Abstract of Japan, vol. 015, No. 442 (1989) and JP-A-03 185 742 (NEC Corp) (1991).
Shunpei et al., Manufacture of Electronic Device, Abstract of Japan, vol. 014, No. 079 (1990) and JP-A-01-292 849 (Semiconductor Energy Lab Co Ltd) (1989).
Takayuki, Semiconductor Device, Abstract of Japan, vol. 014, No. 065 (1990) and JP-A-01-283 855 (NEC Corp) (1989).
Shunpei et al., Lead Frame and Manufacture of Electronic Device Incorporating the Same, Abstract of Japan, vol. 014, No. 229 (1990) and JP-A 02 060 154 (Semiconductor Energy Lab Co Ltd) (1990).
Michio et al., Semiconductor Device and Manufacture Thereof, Abstract of Japan, vol. 013, No. 578 (1989) and JP-A-01 243 441 (Hitachi Ltd) (1989).
Nova Tran Corporation Parylene Conformal Coatings Specifications and Properties, Sales Literature, 1991, pp. 1-11.
Bilodeau Thomas G.
International Business Machines - Corporation
Niebling John
LandOfFree
Process of making an integrated circuit chip composite does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Process of making an integrated circuit chip composite, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Process of making an integrated circuit chip composite will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-243736