Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With contact or lead
Reexamination Certificate
1999-08-19
2001-09-04
Meier, Stephen D. (Department: 2822)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
With contact or lead
C257S780000, C257S781000, C257S782000, C257S748000, C257S666000, C257S673000, C257S676000, C257S778000, C257S774000, C257S697000
Reexamination Certificate
active
06285077
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates generally to semiconductor integrated circuit packages, and more particularly to a flex tape ball grid array package.
2. Description of the Related Art
Tape ball grid array packages (TBGA's) are an increasingly common form of packaging for integrated circuits. TBGA's comprise a flexible plastic tape comprising a dielectric material, such as Kapton, and a metal pattern (traces) formed on the dielectric material. The metal pattern is connected to bond pads on an integrated circuit by a tape automated bonding process or some other process, such as wire bonding as is shown in co-pending application Ser. No. 08/837,686, filed Apr. 21, 1997. Each of the traces is connected to a solder ball, which serves as the electrical interface between the package and a printed circuit board. In this manner, integrated circuit bond pads in TBGA's are electrically coupled to an appropriate solder ball.
The flexible tape material is relatively thin and therefore allows the entire package to be correspondingly thin and lightweight. These characteristics are beneficial for systems that are portable, such as cellular phones and other handheld electronic devices.
The metal pattern mentioned above is typically constructed by laminating a metal foil layer to the tape material or by evaporating metal on the tape material. The metal pattern is then formed by selectively etching away the metal layer. The number of traces that may be created in this fashion for a given area of tape (i.e. the density of traces) is limited by etch techniques. It would be desirable to increase the trace density of conventional TBGS'S.
SUMMARY OF THE INVENTION
The present invention answers the above needs. The present invention comprises a package for an integrated circuit, comprising two layers (a top layer and a bottom layer) of flexible tape, each of which has a top surface and a bottom surface, with metal traces on the top surface. A die is mounted on top of the two layers and wire bonds connect bond pads on the die to metal traces on each of the two flexible tapes. The metal traces are routed along the top surfaces of the flexible tapes and are coupled to solder balls through holes in the tapes. These solder balls are mounted along the bottom of the package and serve as the electrical interface to a printed circuit board. Additional holes in the bottom layer tape allow solder balls to extend through the bottom layer tape so that they may be electrically coupled to traces on the top layer tape.
REFERENCES:
patent: 5844168 (1998-12-01), Schueller
patent: 5990545 (1999-11-01), Schueller
patent: 6011694 (2000-01-01), Hirakawa
patent: 6048753 (2000-04-01), Farnworth
patent: 6069407 (2000-05-01), Hamzehdoost
patent: 6072700 (2000-06-01), Nam
Chia Chok J.
Lim Seng-Sooi (Allen)
Low Qwai Hoong
LSI Logic Corporation
Meier Stephen D.
Mitchell James
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