1985-08-30
1987-12-08
Edlow, Martin H.
357 41, H01L 2978
Patent
active
047121238
ABSTRACT:
A dynamic memory device including 1-transistor, 1-capacitor type dynamic memory cell, wherein a half voltage of the writing voltage is applied to a cell plate, and a constant voltage is applied to the substrate.
REFERENCES:
patent: 424002 (1980-12-01), Kuo
1980 IEEE International Solid-State Circuits Conference, Session XVII: Random Access Memories--Fam 17.6 A 5V-Only 64K Ram.
IEEE Transactions on Electron Devices, vol. ED-27, No. 8, Aug. 1980, Single 5-V, 64K Ram with Scaled-Down MOS Structure.
Dosaka Katsumi
Fujishima Kazuyasu
Hidaka Hideto
Kumanoya Masaki
Miyatake Hideshi
Edlow Martin H.
Mitsubishi Denki & Kabushiki Kaisha
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