Patent
1995-06-09
1999-08-31
Teska, Kevin J.
G06F 1700, G06F 1750
Patent
active
059464763
ABSTRACT:
The method and apparatus is disclosed, for designing the layout of circuit component patterns on a semiconductor integrated circuit. A CAD system includes an input file for storing circuit pattern design data descriptive of the layout of component patterns formed on the semiconductor integrated circuit, and a processing unit coupled to the input file and supplied with circuit pattern control data and window designation data, the circuit pattern control data being descriptive of design requirements of the component patterns. The processing unit inputs the circuit pattern design data from said input file; defines a window over component patterns of the integrated circuit based on the window designation data, thereby identifying data of circuit component patterns that are wholly or partially within the window; generates window pattern data descriptive of the details of the window pattern by using the window designation data; subjects the identified circuit component pattern data to a process according to the design requirement of the circuit pattern control data; and selectively identifies the processed pattern data by referring to the window pattern data to distinguish data relevant to a designer from data irrelevant to the designer.
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Fujitsu Limited
Siek Vuthe
Teska Kevin J.
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