Viterbi decoding method and circuit with accelerated back-tracin

Details Viterbi decoding method and circuit with accelerated back-tracin Viterbi decoding method and circuit with accelerated back-tracin

1995-06-13

1999-08-31

Chin, Stephen

Pulse or digital communications

Receivers

Particular pulse demodulator or detector

371 437, H04L 2706, G06F 1110

Patent

active

059463619

ABSTRACT:
In a first aspect of the invention, a Viterbi decoding circuit stores comparison result bits in a bit-accessible path memory unit. A back-trace is performed by setting a state value in a shift register, then shifting comparison result bits from the path memory unit into the shift register. A certain number of bits at the shift-in end of this register are supplied as read address bits to the path memory unit. In a second aspect of the invention, a Viterbi decoding circuit has selectors that first select old path metric values and branch metric values, which are added or subtracted to produce candidate path metric values, then select the candidate path metric values, which are subtracted to produce a comparison result bit representing the sign of their difference. These additions and subtractions are performed by the same arithmetic unit.

REFERENCES:
patent: 5375129 (1994-12-01), Cooper
Imai, Fugo Riron (Coding Theory), Institute of Electronics, Information, and Communication Engineers of Japan, pp. 286 and 287, Mar. 15, 1990.
"Bei TI-sha no Keitai Denwa-yo DSP, Bitabi Fukugoka-yo Kairo wo Naizo" (TI puts Viterbi decoding circuit in DSP for portable telephones), Nikkei Electronics, Feb. 28, 1994, pp. 15-16.

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