Patent
1988-12-27
1992-05-12
Cangialosi, Salvatore
G06F 1208
Patent
active
051135132
ABSTRACT:
An address for writing data in a host memory connected to a first bus is converted into an address for writing the data in an interface memory connected to a second bus. Connection/disconnection of the data line of the first bus to/from the data line of the second bus is controlled so that program data stored in an external storage device connected to the first bus is simultaneously written in the host memory at the writing address and the interface memory at the converted address to realize data transfer to the interface memory. A program can be directly transferred from the external storage device to the interface memory without going through the host memory, thus achieving high-speed program transfer.
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Cangialosi Salvatore
Kabushiki Kaisha Toshiba
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