Method and apparatus for performing high speed divide operations

Details Method and apparatus for performing high speed divide operations Method and apparatus for performing high speed divide operations

1992-12-31

1994-05-10

Mai, Tan V.

Boots, shoes, and leggings

G06F 752

Patent

active

053114604

ABSTRACT:
A method and circuit for calculating the quotient, and remainder terms of a division operation. The circuit includes a plurality of identical stages repeated for each binary bit of the dividend. Each stage receives a single data bit from the dividend, and two or more bits from the remainder terms created by the next more significant bit. The plurality of stages produce the quotient bit and remainder terms, based on the value of the divisor much more quickly than is possible using prior art techniques.

REFERENCES:
patent: 4935892 (1990-06-01), Nishiyama et al.
patent: 5012439 (1991-04-01), Nash et al.
patent: 5027309 (1991-06-01), Koumoto et al.

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