Selectively configurable integrated circuit device for performin

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36472416, 36472501, G06F 752

Patent

active

053114590

ABSTRACT:
A single integrated circuit device is disclosed that is capable of selectively functioning in real time as either a sequential matrix multiplier, a parallel matrix multiplier, a convolver or a finite input response FIR filter in order to process image data. A core group of multipliers is used to provide the basic multiplication operation that is common to each of the desired image processing functions. Input data router unit, coefficient router units and an output data router unit are responsive to mode selection control signals, supplied to a mode selection port, to route the appropriate input data and coefficients to the core group of multipliers and to route the output of the adders to the correct output port(s) for each of the desired processing functions.

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patent: 4891689 (1990-01-01), Senda et al.
patent: 4937774 (1990-06-01), Malinowski
patent: 5001663 (1991-03-01), Parulski et al.
patent: 5151953 (1992-09-01), Landeta
patent: 5195050 (1993-03-01), Hsu et al.

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