Method of forming doped shallow electrical junctions

Details Method of forming doped shallow electrical junctions Method of forming doped shallow electrical junctions

1993-08-02

1994-05-10

Breneman, R. Bruce

Fishing, trapping, and vermin destroying

437165, 437166, 437233, 437234, 437937, 437950, 148DIG30, 148DIG17, 148DIG144, H01L 2122

Patent

active

053107110

ABSTRACT:
Very shallow electrical junctions may be formed in an oxide free surface of a semiconductor by introducing an inert or reducing gas into a vacuum processing chamber, heating the semiconductor to between 750.degree. C. and 1100.degree. C., introducing a dilute solution of a dopant gas into the chamber, and exposing the semiconductor to the gases for about 0.5 to about 100 minutes, preferably between 10 and 30 minutes. A relatively wide range of surface dopant concentrations may be achieved thereby with dopant concentration controlled independent of junction depth. Non-oxide free semiconductor surfaces may be made oxide free by first heating the semiconductor surface in the presence of the reducing gas. This technique provides uniform surface dopant concentrations and is suitable for the formation of junctions in deep trenches and other features having high aspect ratios.

REFERENCES:
patent: 5124272 (1992-06-01), Saito et al.
patent: 5183777 (1993-02-01), Doki et al.
Hsueh in "Phosphorus diffusion in silicon using Phosphene" J. Electro Chem. Soc. Solid state sci. vol. 117(6), Jun. 1970, pp. 807-811.
Garg et al. in "Use of POCl.sub.3 x for diffusion of phosphorus into silicon" Indian Journal of Technology vol. 8, May 1970, pp. 172-174.

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