Apparatus for detecting, correcting and logging single bit memor

Details Apparatus for detecting, correcting and logging single bit memor Apparatus for detecting, correcting and logging single bit memor

1980-06-03

1983-02-01

Springborn, Harvey E.

Boots, shoes, and leggings

371 13, 371 38, G06F 1110, G11C 2900

Patent

active

043719309

ABSTRACT:
Apparatus which detects and corrects both transient and single bit memory read errors while selectively logging only solid (that is, hardware-related) single bit memory read errors. Each of a plurality of memory modules directly transmits uncorrected memory data to a processor memory control while also providing for automatic local restoring of corrected data back into the memory address which produced the single bit error. The processor memory control provides its own error detection and correction which detects both multiple and single bit errors. Multiple bit errors are not corrected, but are merely brought to the attention of the processor. Single bit errors are corrected but only those which are found to most likely be solid errors are logged. A solid single bit error is recognized by detecting when two single bit errors having the same memory address occur consecutively.

REFERENCES:
patent: 4174537 (1979-11-01), Chu et al.
patent: 4255808 (1981-03-01), Schaber

Affiliated with

Also associated with

Rating

Apparatus for detecting, correcting and logging single bit memor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Apparatus for detecting, correcting and logging single bit memor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Apparatus for detecting, correcting and logging single bit memor will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2409609