Tracking status detector for a digital delay lock loop

Oscillators – Automatic frequency stabilization using a phase or frequency... – Afc with logic elements

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325 63, 331 18, 331 25, 331 64, H03B 304

Patent

active

039612821

ABSTRACT:
An unlocked detector for a digital delay lock loop employs an up-down cour which periodically accumulates the algebraic sum of the quantized positive and negative adjustments made at a preselected rate by the incremental phase modulator. Whenever this sum reaches a specified threshold value corresponding to a particular phase error, an unlocked indication is given. Arrangements utilizing the same principle are disclosed for analog loops.

REFERENCES:
patent: 3456196 (1969-07-01), Schneider
patent: 3710274 (1973-01-01), Basse et al.
patent: 3715751 (1973-02-01), Mead

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