Static information storage and retrieval – Floating gate – Particular biasing
Patent
1997-09-30
1998-12-01
Le, Vu A.
Static information storage and retrieval
Floating gate
Particular biasing
36518529, 36518901, G11C 700
Patent
active
058448438
ABSTRACT:
A single chip data processing apparatus having a central processing unit (CPU) and a flash memory constituted by electrically rewritable nonvolatile memory cells. The flash memory can be written with data under the control of the built-in CPU in an external write operation mode of the apparatus and, also, the CPU executes a data processing operation in accordance with a data processing program in a normal operation mode. In the external write operation mode, the CPU decodes a command by executing a command analyzing program so as to determine a process to be performed to the flash memory. Based on the decoding result of the command, the CPU executes a control program for performing the process to the flash memory, which process can be changing threshold voltages of selected nonvolatile memory cells of the flash memory to predetermined threshold voltages or verifying whether or not the threshold voltages of selected ones of the nonvolatile memory cells of the flash memory have been changed to predetermined threshold voltages. The data processing apparatus also has a built-in command latch circuit, an address latch circuit as well as a data latch circuit such that the CPU reads the command latched in the command latch circuit and decodes the command by executing the command analyzing program and, also, performs the process to the flash memory on the basis of the address latched in the address latch circuit and the data latched in the data latch circuit.
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Ishikawa Eiichi
Matsubara Kiyoshi
Mukai Hirofumi
Sato Masanao
Hitachi , Ltd.
Hitachi ULSI Engineering Corp.
Le Vu A.
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