Information processing system having smart memories

Details Information processing system having smart memories Information processing system having smart memories

1987-08-10

1989-04-18

Shaw, Gareth D.

Boots, shoes, and leggings

G06F 944, G06F 1516

Patent

active

048232572

ABSTRACT:
An information processing system including a host CPU and a plurality of external memories is disclosed in which each of the external memories is formed of a smart memory having a large memory capacity, a linear address arrangement and an arithmetic and logical function, and the host CPU and each smart memory are coupled by a common intermediate language. In this information processing system, the number of accesses between the host CPU and each smart memory having a large memory capacity decreases, that is, an access gap is reduced. And the host CPU and the smart memories can be coupled to one another by the common intermediate language in a unific manner, even when internal languages used in the smart memories are different from each other.

REFERENCES:
patent: 4309756 (1982-01-01), Beckler
patent: 4642764 (1987-02-01), Auslander et al.
patent: 4656582 (1987-04-01), Chaitin et al.
patent: 4656583 (1987-04-01), Auslander et al.
patent: 4667290 (1987-05-01), Goss et al.
patent: 4747044 (1988-05-01), Schmidt et al.
patent: 4773007 (1988-09-01), Kanada et al.

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