High voltage lateral MOS structure with depleted top gate region

Details High voltage lateral MOS structure with depleted top gate region High voltage lateral MOS structure with depleted top gate region

1986-01-07

1989-04-18

Clawson, Jr., Joseph E.

357 238, 357 35, H01L 2980

Patent

active

048231738

ABSTRACT:
The present invention provides an improved lateral drift region for both bipolar and MOS devices where improved breakdown voltage and low ON resistance are desired. A top gate of the same conductivity type as the device region with which it is associated is provided along the surface of the substrate and overlying the lateral drift region. In an MOS device, the extremity of the lateral drift region curves up to the substrate surface beyond the extremity of the top gate to thereby provide contact between the JFET channel and the MOS channel.

REFERENCES:
patent: 4270137 (1981-05-01), Coe
patent: 4300150 (1981-11-01), Colak
patent: 4344080 (1982-08-01), Tihanyi
patent: 4394674 (1983-07-01), Sakuma et al.
patent: 4409606 (1983-10-01), Wagenaar et al.
patent: 4422089 (1983-12-01), Vaes et al.
patent: 4485392 (1984-11-01), Singer
H. Vaes et al., "High-Voltage, High Current Lateral Devices", 1980 IEDM Conf. Proc., Dec. 8-10, 1980, pp. 87-90.

Affiliated with

Also associated with

Rating

High voltage lateral MOS structure with depleted top gate region does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with High voltage lateral MOS structure with depleted top gate region, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High voltage lateral MOS structure with depleted top gate region will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2399414