Picoprocessor

Patent

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G06F 100

Patent

active

051776790

ABSTRACT:
This invention provides an instruction-driven, bit stream sequencer for digital computers that uses a reduced instruction set with as few as four instructions. The sequencer receives a sequence of M-bit control words; and each control word consists of an m.sub.1 -bit flag select word that selects an input or output line (out of a population of up to 2.sup.m.sbsp.1 lines) and an m.sub.2 -bit op code word that selects from among a population of 2.sup.m.sbsp.2 instructions, with m.sub.1 +m.sub.2 =M. The sequencer uses two one-bit registers and a logic function unit. One register receives a bit from the input port of the sequencer and passes the bit to the logic function unit. The second register, which holds a bit representing the present state of the processing, also passes this bit to the logic function unit for formation of a logical function or command based on these two bits; the second register also serves as the source of bits for the output lines of the sequencer. Formation of the logical complement of a bit can be done internally or at the input and output ports.

REFERENCES:
patent: 4296475 (1981-10-01), Nerderlof et al.
patent: 4514804 (1985-04-01), Kimoto
patent: 4517657 (1985-05-01), Schwefel
patent: 4604658 (1986-08-01), Hibeno et al.
patent: 4612613 (1986-09-01), Gershenson et al.
patent: 4789957 (1988-12-01), Niehaus et al.

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