Error correction circuit

Details Error correction circuit Error correction circuit

1989-09-01

1991-11-26

Beausoliel, Robert W.

Excavating

371 374, 371 376, G06F 1110

Patent

active

050688570

ABSTRACT:
An error correction circuit has a parallel circuit of an RS code sequence circuit and a CRC coding sequence circuit to form a sequence circuit and a control circuit for selecting either one of them depending on the desired operation mode.

REFERENCES:
patent: 4785451 (1988-11-01), Sako
patent: 4949342 (1990-08-01), Shimbo
Yoshida et al., "A Study of Decoding RS Codes with Galois Operation Unit", The 9th Information Theory and its Application Symposium, pp. 167-170 (1986).
Yoshida et al., "Error Correction Unit for Optical Disks", Sho 61 Shin So Zen Tai, 6-53 (1987).
S. Broadbent, "Real Time Diagnostics Logging and Analysis", vol. 26, No. 10A, Mar. 1984, pp. 5001-5003 (IBM TDB).
C. Chen, "High-Speed Cyclic Redundancy Checking Scheme for Error Correcting Codes", vol. 22, No. 6, 11/1979, pp. 2365-2368, (IBM TDB).
"American National Standard 130 mm Re-Writable Optical Disk Cartridge", Tech. Comm. of Accredited Standards Comm. X3, pp. 41-42, 4/1988.

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