Process monitor circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307242, 307243, 307572, 307590, 307591, 307595, 307600, 307601, 364490, 364569, 324 731, 324617, 324621, H03K 513, H03K 5159

Patent

active

050685473

ABSTRACT:
In accordance with the present invention, a process monitor circuit and a method for monitoring a process are provided. The process monitor circuit provides first and second logic paths, the first logic path having a delay sensitive to whether the input logic transition is from logic high to logic low, or from logic low to logic high. The second logic path has substantially equal delays for either logic state transition. The two differences in delay between the first and second logic paths under the two logic state transitions are used to monitor the process steps for manufacturing the P and N transistors.

REFERENCES:
patent: 4146835 (1979-03-01), Chnapko et al.
patent: 4392105 (1983-07-01), McLeod
patent: 4712061 (1987-12-01), Lach
patent: 4845390 (1989-07-01), Chan
patent: 4970454 (1990-11-01), Stambaugh et al.

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