Programmable clock for an analog converter in a data processor a

Details Programmable clock for an analog converter in a data processor a Programmable clock for an analog converter in a data processor a

1993-11-26

1995-04-04

Wambach, Margaret Rose

Electrical pulse counters, pulse dividers, or shift registers: c

Systems

Particular input circuit

377 42, 377 52, 327175, 327291, H03K 2102, H03K 2366

Patent

active

054043867

ABSTRACT:
A data processing system (10) includes a programmable clock signal for an analog converter (28). A duty cycle of the programmable clock signal is programmed by an external user in a prescaler rate selection register (16). A counter subsequently counts for a first period of time corresponding to a phase in which the programmable clock signal is asserted. The counter then counts for a second period of time corresponding to a phase in which the programmable clock signal is negated. By allowing the user to program and modify the duty cycle of the programmable clock signal, the performance of the analog converter (28) may be optimized without constraining the requirements of an external system clock.

REFERENCES:
patent: 4389637 (1983-06-01), Rzeszewski, III
patent: 4567466 (1986-01-01), Bozarth et al.
patent: 4685614 (1987-08-01), Levine
patent: 5045715 (1991-09-01), Fitch

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