Multiplex communications – Wide area network – Packet switching
Patent
1992-02-10
1994-10-18
Olms, Douglas W.
Multiplex communications
Wide area network
Packet switching
3701051, 375112, H04J 307
Patent
active
053575148
ABSTRACT:
In a byte destuffing circuit, a received data signal in a byte interleaved multiple frame structure is stored into a buffer memory, and a clock sequence is recovered. The recovered line clock is applied to a write address generator for storing the data on a per byte basis into a buffer memory. In response to a destuffing control signal, the write address generator suspends the generation of a write address if positive byte stuffing is effected at the transmit end, and destuffing is effected on the recovered clock sequence on a bit-by-bit basis during successive eight frames. The destuffed clock sequence is applied to a phase comparator for comparison with a local clock sequence generated by a VCO which is controlled by the phase comparator in a phase-locked loop. The local clock sequence is used to drive a read address generator for reading data from the buffer memory on a per byte basis.
REFERENCES:
patent: 4811340 (1989-03-01), McEachern et al.
patent: 4847875 (1989-07-01), Choi
patent: 4928275 (1990-05-01), Moore et al.
NEC Corporation
Olms Douglas W.
Vu Huy D.
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