Process for providing self-aligned doping regions by ion-implant

Details Process for providing self-aligned doping regions by ion-implant Process for providing self-aligned doping regions by ion-implant

1978-06-05

1979-03-13

Rutledge, L. Dewayne

Metal treatment

Compositions

Heat treating

148187, 156643, 357 23, 357 91, H01L 21265, H01L 2128, H01L 2978, B01J 1700

Patent

active

041441010

ABSTRACT:
A process for providing ion-implanted regions in a substrate such as silicon beneath an existing layer such as silicon dioxide and being self-aligned to subsequently fabricated regions of said layer which includes providing a resist masking pattern above the existing layer wherein the resist masking pattern has vertical sidewalls (i.e., perpendicular to the upper surface of the substrate) or is undercut; ion-implanting impurities such as boron ions through the layer but not through the resist and portions of the layer beneath the resist; and depositing a layer of lift-off material such as aluminum on the existing layer and on the resist. The implantation step must be performed after providing the undercut resist masking pattern, but before depositing the layer of lift-off material in order to achieve the desired self-alignment feature. Because of the resist profile (i.e., vertical walls or being undercut) no lift-off material is deposited on the sidewalls of the resist and a gap is formed between the resist and that portion of the lift-off material which is above the existing layer. The resist pattern is removed along with the portion of the lift-off material layer deposited thereon. The now-exposed portion of the existing layer located beneath the previous resist pattern is then removed. Finally, the remaining regions of lift-off material are removed from above the regions of the existing layer.
The ion-implanted regions occur in the substrate beneath the remaining portions of the existing layer, are self-aligned to the boundaries of said portions, and correspond to a negative image of the original undercut resist masking pattern.

REFERENCES:
patent: 3752711 (1973-08-01), Kooi et al.
patent: 4030942 (1977-06-01), Keenan et al.
Fredericks et al., "Polysulfone Lift-Off --- Technique," IBM-TDB, 20, (1977), 989.
Carr et al., "Structure for Lift-Off Mask ---," IBM-TDB, 18, (1975), 1396.
Alcorn et al., "Lift-Off --- Photoresist With Dual Etch ---," IBM-TDB, 20, (1978), 4009.
Fortino et al., "Poly-Si Drain MOSFET ---," IBM-TDB, 20, (1977), 539.
Chiu et al., "Ion-Etch Lift-Off Process," IBM-TDB, 19, (1977), 3409.
Gegenwartt et al., "Capped Cu Lift -Off ---," IBM-TDB, 15, (1973), 3538.
Cuomo et al., "Mask Substrate Surface Shield," IBM-TDB, 15, (1972), 1728.

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