Electronic device having pseudo-SRAM and CPU operating in an act

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G06F 106

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active

055686370

ABSTRACT:
An electronic device uses a pseudo-SRAM having a self-refreshing function, as a memory, and a refresh timing signal having a predetermined period is supplied to the pseudo-SRAM in the operation state of the electronic device. When no key operation is performed with a keyboard for a predetermined period of time, the electronic device switches into an idle mode to stop supply of an operation clock to a CPU and to stop supply of the timing signal to the pseudo-SRAM. When the supply of the timing signal to the pseudo-SRAM is stopped, the pseudo-SRAM operates the self-refreshing function for holding data with low power consumption. When a key operation is detected in the idle mode, a refresh timing signal having a high frequency is supplied to the pseudo-SRAM for a predetermined period of time. Thereafter, the supply of a clock to the CPU is restarted, and the state of the electronic device is returned to a normal operation state.

REFERENCES:
patent: 4249247 (1981-02-01), Patel
patent: 5276843 (1994-01-01), Tillinghast et al.
patent: 5369771 (1994-11-01), Gettel
patent: 5371693 (1994-12-01), Nakazoe
Electro Conference Record, vol. 18, Apr., 1993, Los Angeles, US, pp. 147-151, Shekar "Pseudo Static Memory, Your Cost Effection Solution To Memory Subsystem Design".

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