Amplifiers – With semiconductor amplifying device – Including push-pull amplifier
Patent
1995-05-18
1996-10-22
Mullins, James B.
Amplifiers
With semiconductor amplifying device
Including push-pull amplifier
331116FE, H03F 330
Patent
active
055680933
ABSTRACT:
A power efficient class A-B amplifier provides 20 dB amplification for a low capacitive load such as a 40 to 80 MHz clock signal in a crystal oscillator circuit. The amplifier includes two bias-and-clamp circuits coupled between an input stage and the gates of an N-channel transistor and a P-channel transistor. The N-channel and P-channel transistors are connected in series between VCC and ground and form an output stage. The bias-and-clamp circuits bias the N-channel and P-channel transistors in weak inversion for maximum amplification and clamp an input voltage to increase noise immunity and reduce power use. In one embodiment, each bias-and-clamp circuit includes two pairs of series connected transistors. A first pair is connected in series with a constant current source and form current mirrors with a second pair of transistors. A node between transistors in the second pair is connected to the gate of a transistor in the output stage and to the input voltage. Transistors in the bias-and-clamp circuits have a conductivity type which matches the conductivity type of the transistor in the output stage which the bias-and-clamp circuit controls.
REFERENCES:
patent: 4013979 (1977-03-01), Vittoz
patent: 4352073 (1982-09-01), Leuthold
patent: 4360789 (1982-11-01), Lewyn et al.
patent: 4387349 (1983-06-01), Rapp
patent: 4459565 (1984-07-01), Leach
Vittoz, "Quartz Oscillators For Watches", 10th International Congress of Chronometry, Sep. 11-14, 1979, pp. 131-140.
Vittoz et al., "Low-Power/Low-Voltage IC Design," Electronics Laboratories Advanced Engineering Course, Ecole Polytechnique Federale de Lausanne, Lausanne-Switzerland, Jun. 27, 1994, pp. 13-14.
Millers David T.
Mullins James B.
National Semiconductor Corporation
Winters Paul J.
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