GaAs short channel lightly doped drain MESFET structure and fabr

Details GaAs short channel lightly doped drain MESFET structure and fabr GaAs short channel lightly doped drain MESFET structure and fabr

1984-08-27

1987-01-13

Larkins, William D.

357 15, H01L 2980, H01L 2948

Patent

active

046368221

ABSTRACT:
Disclosed is a self-aligned GaAs, lightly doped drain metal-semiconductor field effect transistor. In one embodiment, the device consists of a shallow n.sup.- active channel region formed on a GaAs substrate, a Schottky gate overlying the n.sup.- region and highly doped and deep n.sup.+ source and drain regions formed on either side of the gate. In the channel region between the gate edges and the source/drain are positioned n-type source/drain extensions which have an intermediate depth and doping concentration to minimize the device series resistance, suppress short channel effects and permit channel length reduction to submicron levels.
In a second embodiment, p-type pockets are provided under the source/drain extensions to better control the device threshold voltage and further reduce the channel length.
In terms of the method of fabrication of the first embodiment, starting with a GaAs substrate an n.sup.- semiconductor layer is formed in the device active region. Next, a Schottky gate is formed in direct contact with the n.sup.- layer. Next, a dielectric layer is deposited and reactive ion etched (RIE), forming gate sidewalls. Then, n-type source/drain extensions are formed followed by repetition of the dielectric layer deposition and RIE to enlarge the gate sidewalls. Finally, source/drain are implanted.
To form the second structure a p-type ion implantation is accomplished prior to or after the source/drain extension forming step to form the deep p-type pockets.

REFERENCES:
patent: 3997908 (1976-12-01), Schloetterer et al.
patent: 4204894 (1980-05-01), Komeda et al.
patent: 4304042 (1981-12-01), Yeh
patent: 4366613 (1983-01-01), Ogura et al.
patent: 4389768 (1983-06-01), Fowler et al.
patent: 4396437 (1983-08-01), Kwok et al.
patent: 4425573 (1984-01-01), Ristow
patent: 4553316 (1985-11-01), Houston et al.
"Design and Performance of GaAs Normally-Off MESFET Integrated Circuits" IEEE Transactions on Electron Devices, vol. ED-27, No. 6, Jun. 1981, by Katsuhiko Suyama, Hirotsugu Kusakawa and Masumi Fukuta, pp. 1092-1097.
"A Half Micron MOSFET Using Double Implanted LDD", IEDM 82 pp. 718-721, by S. Ogura, C. F. Codella, N. Rovedo, J. F. Shepard and J. Riseman.
"An Optimized 0.5 Micron LDD Transistor" IEDM 83, pp. 237-239, by S. Rathnam, H. Bahramian, D. Laurent and Yu-Pin Han.

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