Coating processes – Electrical product produced – Integrated circuit – printed circuit – or circuit board
Patent
1987-03-13
1989-07-25
Pianalto, Bernard D.
Coating processes
Electrical product produced
Integrated circuit, printed circuit, or circuit board
156643, 156648, 20419234, 20419237, 427 38, 427259, 427265, 427270, 437 56, 437 61, 437176, 437177, 437178, 437188, 437192, 437193, 437200, 437201, 437203, 437228, 437229, 437233, 437239, 437243, 437915, 437985, B05D 512
Patent
active
048512575
ABSTRACT:
A process for the formation of a compact vertical contact having reduced lateral space requirements yet compatible with highly planarized semiconductor manufacturing processes. The contact is made from a foundation region having a top surface to an overlying layer separated from the foundation region by a dielectric. The overlying layer can be contacted on its edge rather than on its top surface in order to reduce the lateral expanse of the contact.
Rivoli Anthony L.
Young William R.
Harris Corporation
Krawczyk Charles C.
Pianalto Bernard D.
Troner William A.
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