Multiprocessor system with several processors equipped with cach

Details Multiprocessor system with several processors equipped with cach Multiprocessor system with several processors equipped with cach

Filed on

1987-10-01

Date issued

1990-05-08

Examiner

Eng, David Y.

Patent Class

Boots, shoes, and leggings

Other Related Categories

36424341, G06F 1208, G06F 1516, G06F 1300

Type

Patent

Status

active

Patent number

049243799

Description

ABSTRACT:
In such a multiprocessor, in which the common memory (M) or one of the cache memories (C1, C2) can be owner of a variable determined by its address and in which it is always only the owner of a variable which delivers it to the bus (1) following a read request, the concept of ownership is further developed by the present invention with respect to implementing it with standard buses which, per se, are not intended for this purpose, and with respect to the greatest possible efficiency.

REFERENCES:
patent: 3735360 (1973-05-01), Anderson et al.
patent: 3845474 (1974-10-01), Lange et al.
patent: 3967247 (1976-06-01), Anderson et al.
patent: 4442487 (1984-04-01), Fletcher et al.

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