Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry
Patent
1990-04-20
1992-04-14
Groody, James J.
Facsimile and static presentation processing
Facsimile
Specific signal processing circuitry
H04N 508
Patent
active
051052725
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
The present invention relates to a synchronizing signal extracting apparatus for a display device for projecting high quality television pictures.
In the conventional NTSC system television signals, the horizontal synchronizing signal is a negative polarity pulse inserted on the black level side of the picture signal. On the other hand, studio standards of a high quality television system prescribe that the horizontal synchronizing signal is take the form of the so-called ternary value synchronizing signal which comprises two pulses of a negative and positive polarity. The present invention relates to a synchronizing signal detaching apparatus which is capable of correctly reproducing the ternary value synchronizing signals.
FIG. 1 is a block diagram of the conventional synchronizing signal extracting apparatus. In FIG. 1, reference denotes 101 a current amplifying circuit for amplifying composite signals including a ternary value synchronizing signal and a picture signal, 102 denotes a peak clamping circuit for securing the negative peak of the output of the current amplifying circuit 101 to a constant direct current level, and 103 denotes a voltage comparing circuit for outputting a prescribed voltage when the output of the peak clamping circuit 102 is lower than a reference value.
By the above-described construction, positive polarity synchronizing signals are obtained in the output of the voltage comparing circuit 103. FIGS. 2(a)-(d) depict voltage waveforms of each portion of the conventional synchronizing signal extracting apparatus. The operation of the conventional synchronizing signal extracting apparatus of FIG. 1 will be described below with reference to FIG. 2.
The composite signal a of FIG. 2(a) is amplified in the current amplifying circuit 101 and is inputted to the peak clamping circuit 102. As the negative peak of the ternary value synchronizing signal is clamped to 0 V, the output of the peak clamping circuit 102 is provided as shown in FIG. 2(b). When the signal "b" is inputted into the voltage comparing circuit 103, this electric potential of the signal is compared with a voltage comparison reference potential for and the comparison result is output as shown in FIG. 2(c). As shown in FIG. 2, although the signal "c " contains the so-called pedestal portion, the level of the pedestal may be made have a potential of zero if the reference potential of the voltage comparison is adjusted each time, so that the output of the voltage comparing circuit 103 includes only the positive polarity pulses as shown in FIG. 2(d). A point at which each output pulse in FIG. 2(d) drops to the 0 potential is used as the synchronizing reference of the high quality television receiver image receiving device.
In, the synchronizing signal extracting apparatus of the conventional embodiment, it is necessary to adjust the comparative reference potential of the voltage comparing circuit to obtain the synchronizing reference of the high quality television image receiving device. Accordingly, if a variation of the reference potential and an output variation of the peak clamping circuit are present, the width of the output pulse becomes narrower when the waveform of the input synchronizing signal losses its sharpness due to the capacitive component of the signal transmission path, with a disadvantage resulting in that the pedestal portion is contained in the output as shown in FIG. 2(c) to prevent the synchronizing reference from being reproduced.
SUMMARY OF THE INVENTION
A main object of the present invention is to provide a synchronizing signal extracting circuit which is capable of correctly reproducing the synchronizing reference in the ternary value synchronizing signal.
In order to achieve the above-described object, the synchronizing signal extracting apparatus of the present invention includes a circuit for obtaining two composite picture signals having mutually reversed phases from the input composite picture signal, a pedestal clamping circuit for equalling the pedestal level
REFERENCES:
patent: 3706847 (1972-12-01), Smeulers
patent: 3819859 (1974-06-01), Borsuk et al.
patent: 4081833 (1978-03-01), Akiyoma
patent: 4084187 (1978-04-01), Schlotehauer et al.
patent: 4942469 (1990-07-01), Kanai
Groody James J.
Harvey David E.
Matsushita Electric - Industrial Co., Ltd.
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