Metal working – Method of mechanical manufacture – Assembling or joining
Patent
1984-03-09
1987-01-13
Ozaki, George T.
Metal working
Method of mechanical manufacture
Assembling or joining
29576B, 29576W, 29577C, 29578, 29580, 148 15, 148175, 148177, 156646, H01L 21203, H01L 21205
Patent
active
046353437
ABSTRACT:
A method of manufacturing a GaAs semiconductor device of an E/D construction having a GaAs/AlGaAs heterojunction and utilizing two-dimensional electron gas, which includes the steps of forming a heterojunction semiconductor substrate and etching a portion of the substrate to provide a gate portion of a depletion-mode FET. When the substrate of a semi-insulating GaAs layer, an undoped GaAs, an N-type AlGaAs layer providing an electron-supply layer, and a GaAs layer is formed, the GaAs layer is composed of a first GaAs layer, an etching stoppable AlGaAs layer, and a second GaAs layer, the first GaAs layer being formed on the N-type GaAs layer. The etching for provision of the gate portion is carried out by a dry etching method using an etchant of CCl.sub.2 F.sub.2 gas, so that the second GaAs layer can be etched but the AlGaAs layer cannot be etched. Thus, the thickness of the layers between a gate electrode of the depletion-mode FET and the GaAs/AlGaAs heterojunction plane is determined by the formation of the heterojunction substrate, and consequently a better uniformity of the threshold voltage of depletion-mode FETs is obtained.
REFERENCES:
patent: 4371968 (1983-02-01), Trussell et al.
patent: 4523961 (1985-06-01), Hartman et al.
patent: 4545109 (1985-10-01), Reichert
Hiyamizu et al. Appl. Phys. Lett., 37(9), Nov. 1, 1980, pp. 805-807.
Abe et al., Solid State Device 1982, ESSDERC-SSSDT Meeting at Munich, 13th-16th, Sep. 1982, "Advanced Device Technology for High Speed GaAs VLSI", pp. 25-50.
Lee et al, Electronics Letters, vol. 19, No. 5, Mar. 3, 1983, "High Performance Modulation-Doped GaAs Integrated Circuits with Planar Structures", pp. 155-157.
Hirosaka et al. Japanese Journal of Applied Physics, vol. 20, No. 11, Nov. 1981, Selective Etching of AlGaAs-GaAs Heterojunction", pp. L847-L850.
Fujitsu Limited
Ozaki George T.
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