Data communication system with fixed weight error correction and

Details Data communication system with fixed weight error correction and Data communication system with fixed weight error correction and

1983-01-14

1986-02-04

Fleming, Michael R.

Excavating

371 39, 371 40, G06F 1110

Patent

active

045690502

ABSTRACT:
A data communication system having improved error correction and detection capabilities includes an encoder which converts each input word containing three binary message bits to an eight-bit binary code vector which contains exactly four "1's" and four "0's", and thus has a fixed "weight" of 4. In addition, the same symbol (either a "1" or "0") is consecutively repeated in the code vector no more than two times. The code vector is transmitted from a transmitter to a receiver, and the eight-bit received vector is decoded by a decoder to produce an output word containing three message bits. The decoder detects errors in received vectors by checking the weight of the received vector, by checking syndrome based upon predetermined combinations of bits of the received vector, and by performing a parity check on two selected bits of the received vector which should be unequal. Based upon the weight, syndrome and parity checks, the decoder determines the presence of all single and double errors and detects the presence of most high multiple errors in the received vector. In some embodiments, the decoder also corrects the single errors which have been detected, so that the output word can be produced accurately despite the occurrence of single errors in the received vector.

REFERENCES:
patent: 3381271 (1968-04-01), Duuren
patent: 3439327 (1969-04-01), Sourgens
patent: 4134103 (1979-01-01), Huxtable et al.
patent: 4313105 (1982-01-01), Anamthan
patent: 4334309 (1982-01-01), Bannon et al.
patent: 4397022 (1983-08-01), Weng et al.
patent: 4414666 (1983-11-01), Nelson

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