Semiconductor integration device and fabrication method of the s

Details Semiconductor integration device and fabrication method of the s Semiconductor integration device and fabrication method of the s

1998-02-27

2000-04-18

Prenty, Mark V.

Active solid-state devices (e.g., transistors, solid-state diode

Bipolar transistor structure

With specified electrode means

257588, H01L 27082

Patent

active

060518723

ABSTRACT:
A lead electrode (57) is formed to expose an active base region (61). On the lead electrode (57) is formed a lead electrode (64) for an emitter electrode via an insulation film (56). When a base contact hole (65') for exposing the lead electrode (57) and an emitter contact hole for exposing the lead electrode (64) are formed at the same time, total thickness of the insulation film on the lead electrode (64) is thinner than that of the insulation layer on the lead electrode (57), which results in excessive etching on a part of the surface of the lead electrode to form recess. The lead electrode (64) is led out to a LOCOS film to form the emitter contact hole in a region on the LOCOS film to expose the lead electrode (64). Therefore, the recess having been formed on the lead electrode (64) upon forming the emitter contact hole is made to form on the LOCOS film outside the emitter region. The recess prevents depth of the emitter region from dispersing.

REFERENCES:
patent: 4812417 (1989-03-01), Hirao

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