Semiconductor device having an ESD protective circuitry

Details Semiconductor device having an ESD protective circuitry Semiconductor device having an ESD protective circuitry

1996-01-25

1998-01-06

Gaffin, Jeffrey A.

Electricity: electrical systems and devices

Safety and protection of systems and devices

Load shunting by fault responsive means

361111, 361118, H02H 900

Patent

active

057061564

ABSTRACT:
A semiconductor device has a protective circuitry including a common discharge line, a first protective device connected between one of input/output terminals and the discharge line, and a second protective device connected between one of Vcc and ground terminals and the discharge line. The second protective device has an on-resistance as much as 1/2 of the on-resistance of the first protective device. Each of the power terminals and ground terminals generally has a large capacitance to accumulate a large amount of electric charge during a CDM test after charging of the semiconductor device as a whole. The low on-resistance prevents the inner circuit and input/output buffers of the semiconductor device from being applied with a higher potential during subsequent grounding of the semiconductor device in the CDM test.

REFERENCES:
patent: 5521783 (1996-05-01), Wolfe et al.

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