Method of fabricating high density CMOS devices

Metal working – Method of mechanical manufacture – Assembling or joining

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29576B, 29578, 148187, H01L 21265

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active

045676402

ABSTRACT:
A method of forming CMOS transistors with self-aligned field regions comprising the steps of providing on a silicon substrate first and second spaced apart areas for said CMOS transistors followed by forming a masking member on said substrate protecting the first of said areas and exposing the second. The second area is doped with a p-type material after which the size of the unmasked area is increased to that defining a p-well region to be formed therein surrounding said second area. Once the p-well region is formed, the same mask is employed to dope the p-well region with additional p-type material after which the CMOS transistors are fabricated in said first and second spaced apart areas.

REFERENCES:
patent: 3983620 (1976-10-01), Spadea
patent: 4013484 (1977-03-01), Boleky et al.
patent: 4043025 (1977-08-01), Spadea
patent: 4045259 (1977-08-01), Sanders
patent: 4047284 (1977-09-01), Spadea
patent: 4131907 (1978-12-01), Ouyang
patent: 4135955 (1979-01-01), Gasner et al.
patent: 4143388 (1979-03-01), Esaki et al.
patent: 4152717 (1979-05-01), Satou et al.
patent: 4183134 (1980-01-01), Oehler et al.
patent: 4282648 (1981-08-01), Yu et al.
patent: 4295266 (1981-10-01), Hsu
patent: 4306916 (1981-12-01), Wollesen et al.
patent: 4314857 (1982-02-01), Aitken
patent: 4335504 (1982-06-01), Lee
patent: 4372033 (1983-02-01), Chiao
patent: 4373253 (1983-02-01), Khadder et al.
patent: 4376336 (1983-03-01), Endo et al.
patent: 4382827 (1983-05-01), Romano-Moran et al.
patent: 4385947 (1983-05-01), Halfacre et al.
patent: 4391650 (1983-07-01), Pfeifer et al.
patent: 4406710 (1983-09-01), Davies et al.
patent: 4409726 (1983-10-01), Shiota
patent: 4412375 (1983-11-01), Matthews
patent: 4420872 (1983-12-01), de Zaldivar
patent: 4450021 (1984-05-01), Batra et al.

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