Method for forming a zener diode region and an isolation region

Details Method for forming a zener diode region and an isolation region Method for forming a zener diode region and an isolation region

1995-06-05

1996-08-20

Nguyen, Tuan H.

Fishing, trapping, and vermin destroying

437 51, 437 61, 437904, H01L 2104

Patent

active

055478808

ABSTRACT:
A process is disclosed (hereafter referred to as the "BiCDMOS Process") which simultaneously forms bipolar transistors, relatively high voltage CMOS transistors, relatively low voltage CMOS transistors, DMOS transistors, zener diodes, and thin-film resistors, or any desired combination of these, all on the same integrated circuit chip. The process uses a small number of masking steps, forms high performance transistor structures, and results in a high yield of functioning die. Isolation structures, bipolar transistor structures, CMOS transistor structures, DMOS transistor structures, zener diode structures, and thin-film resistor structures are also disclosed.

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