Method of forming semiconductor device having planarized wiring

Fishing – trapping – and vermin destroying

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437192, 437195, H01L 2128

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active

057054266

ABSTRACT:
A method of forming conductive wiring on a semiconductor substrate. A plurality of contact holes having different sizes are formed in an insulating film formed on the substrate. A first barrier metal layer is formed on the insulating film, and a tungsten layer is uniformly formed on the first barrier metal layer. The tungsten layer is etched back to form plug-shaped tungsten regions in small contact holes and tapered tungsten regions in large contact holes. The central area of the first barrier metal layer in the large contact hole is exposed. A second barrier metal layer is formed covering the plug-shaped tungsten region and the tapered tungsten region and the exposed first barrier metal layer and sandwiching the plug-shaped and tapered tungsten regions between the first and second barrier metal layers, preventing punch-through of Al atoms from an Al layer to be thereafter formed, into the substrate, even when the first barrier metal layer is damaged during etch-back.

REFERENCES:
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patent: 5233217 (1993-08-01), Dixit et al.
patent: 5432381 (1995-07-01), Melsner
patent: 5534461 (1996-07-01), Kuwajima
patent: 5534463 (1996-07-01), Lee et al.
patent: 5545926 (1996-08-01), Kohyama et al.

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