Method for fabricating a DRAM trench capacitor with recessed pil

Details Method for fabricating a DRAM trench capacitor with recessed pil Method for fabricating a DRAM trench capacitor with recessed pil

1994-06-29

1997-01-21

Tsai, Jey

Fishing, trapping, and vermin destroying

437203, 437919, H01L 2170, H01L 2700

Patent

active

055959261

ABSTRACT:
A method, and resultant structure, is described for fabricating a DRAM trench capacitor with a single pillar recessed below the level of the top surface of the silicon substrate in which it is formed. First and second insulating layers are formed over the silicon substrate, and patterned to form an opening to the silicon substrate. A portion of the silicon substrate is removed in the region defined by the opening, whereby a first trench is formed. Sidewall spacers are formed along the sides of the first trench from a third insulating layer. A first pillar is formed after depositing a first conductive layer between the sidewall spacers and over the trench and removing the first conductive layer except within the first trench. The sidewall spacers are removed. A portion of the silicon substrate in the first trench is removed that is not vertically masked by the pillar, and simultaneously a portion top of the pillar is removed, whereby a second trench and second pillar are formed at a greater depth in the silicon substrate. The remainder of the second insulating layer is also removed. A capacitor dielectric is formed in the second trench over the second pillar. A second conducting layer is formed over the dielectric layer and removed in the region outside of the trench to form the top capacitor electrode.

REFERENCES:
patent: 4650544 (1987-03-01), Erb et al.
patent: 4859622 (1989-08-01), Eguchi
patent: 4920065 (1990-04-01), Chin et al.
patent: 4978634 (1990-12-01), Shen et al.
patent: 4980310 (1990-12-01), Matsuda et al.
patent: 5106774 (1992-04-01), Hieda et al.
patent: 5204280 (1993-04-01), Dhong et al.
patent: 5256588 (1993-10-01), Witek et al.

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