Variably adjustable clock divider

Details Variably adjustable clock divider Variably adjustable clock divider

1998-01-26

2000-01-25

Wells, Kenneth B.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Frequency or repetition rate conversion or control

327117, H03K 2100

Patent

active

06018258&

ABSTRACT:
A clock divider of a preferred embodiment generates an output clock signal having one of even and odd number of clock cycles of an input clock signal. The output clock signal has a duty cycle of about 50%. In a preferred embodiment, the clock divider includes a divisor circuit, a control circuit and an output circuit.

REFERENCES:
patent: 5714896 (1998-02-01), Nakagawa et al.
patent: 5822229 (1998-10-01), Steinebach
patent: 6614869 (1997-03-01), Bland

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