Computer system of virtual machines sharing a vector processor

Details Computer system of virtual machines sharing a vector processor Computer system of virtual machines sharing a vector processor

1993-11-30

1996-04-23

Pan, Daniel J.

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364228, 3642282, 3642295, 3642305, 36423221, 3642394, 3642429, 3642563, 3642566, 364280, 364DIG1, 364DIG2, G06F 938, G06F 940, G06F 1516

Patent

active

055112170

ABSTRACT:
In a virtual-machine system running on a supercomputer wherein a vector processor is shared among a plurality of operating systems/virtual machines enhancing of the efficiency of a system as a whole is provided. When an activation, status-test or set-up instruction of a vector processor 2 is executed while an OS is running on a scalar processor 1 with an interception flag 7 set to the logic value 1, an exception is generated, canceling the execution of the instruction. In the processing of the interception, whether the logic value of the interception flag is 1 and whether the instruction giving rise to the exception is an activation, status-test or set-up instruction of the vector processor 2 are examined. If the logic value is 1 and the activation, status-test or set-up instruction is verified, an interception is carried out. The virtual-machine monitor emulates the end-interrupt processing of the vector processor, allowing the utilization efficiency of the vector processor to be increased. In addition, the virtual-machine monitor saves and restores control information of the vector processor 2 and initial values of vector processing from and into registers, allowing the efficiency of the system as a whole to be enhanced.

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patent: 5276881 (1994-01-01), Chan et al.
patent: 5285528 (1994-02-01), Hare
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