Vertical type MOS transistor

Details Vertical type MOS transistor Vertical type MOS transistor

1984-06-13

1986-08-26

Edlow, Martin H.

357 2311, 357 55, H01L 2978

Patent

active

046085840

ABSTRACT:
The vertical type MOS transistor includes a transistor body region which consists of an N.sup.+ type (high concentration N type) substrate having a drain electrode connected on its bottom surface, and an N.sup.- type (low concentration N type) layer epitaxially grown on the top surface of the substrate, and a plurality of P type well regions formed with a prescribed interval on the top surface of the N.sup.- type layer. Within a P type well region, there are provided N.sup.+ type source regions, and an oxidized gate region and a gate electrode that bestride over both of an N.sup.+ source region and the N.sup.- type drain region which is to function as the effective drain region.
There are provided stopper grooves of dug-out form, situated between and at equal distances from the adjacent P type well regions, extending downward from the surface of the N.sup.- type drain region parallel to the sides of the P type well regions.

REFERENCES:
patent: 4296429 (1981-10-01), Schroeder
patent: 4329705 (1982-05-01), Baker
patent: 4455740 (1984-06-01), Iwai
Blicher, Adolph, Field-Effect and Bipolar Power Transistor Physics, Academic Press, New York, 1981, pp. 280-283.

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