Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means
Patent
1994-06-02
1995-10-10
Carroll, J.
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including dielectric isolation means
257513, 257520, 437 67, H01L 2704
Patent
active
054573394
ABSTRACT:
A semiconductor device for element isolation comprises a semiconductor substrate having an impurity region of a first conductivity type whose impurity concentration attains the maximum at a predetermined depth from the surface in the depth direction, a trench formed to a predetermined depth in the impurity region of the first conductivity type, and an impurity diffusion region of the first conductivity type formed in the trench with an oxide film interposed and having only its bottom portion connected to the impurity region of the first conductivity type of the semiconductor substrate. In the semiconductor device, a uniform P.sup.+ high concentration region is substantially formed in a bottom portion of an isolation region, so that an isolation threshold value is not affected.
REFERENCES:
patent: 4309716 (1982-01-01), El-Kareh
patent: 4473598 (1984-09-01), Epharth et al.
patent: 4520552 (1985-06-01), Arnould et al.
patent: 4556585 (1985-12-01), Abernathy et al.
patent: 4729964 (1988-03-01), Natsuaki et al.
patent: 4884117 (1989-11-01), Neppl et al.
patent: 4980747 (1990-12-01), Hutter et al.
patent: 5250837 (1993-10-01), Sparks
A. S. Grove, Physics and Technology of Semiconductor Devices, John Wiley & Sons, New York (1967) pp. 78-83.
C. G. Jambotkar, "Improved Polysilicon-Filled Trench Isolation" U.S. Mag.: IBM Technical Disclosure Bulletin, vol. 27, No. 3, Aug. 1984, pp. 1481 to 1482.
B. El-Kareh et al., "Field-Shielded Trench Fill", U.S. Mag.: IBM Technical Disclosure Bulletin, vol. 27, No. 8, Jan. 1985, pp. 4851-4854.
S. D. Malaviya, "Deep Trench Isolation for Bipolar Processes", U.S. Mag.: IBM Technical Disclosure Bulletin, vol. 24, No. 11A, Apr. 1982, pp. 5578 to 5580.
K. D. Beyer et al., "Borosilicate Glass Trench Fill", U.S. Mag.: IBM Technical Disclosure Bulletin, vol. 27, No. 2, Jul. 1984, pp. 1245 to 1247.
Komori Shigeki
Tsukamoto Katsuhiro
Carroll J.
Mitsubishi Denki & Kabushiki Kaisha
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