Fishing – trapping – and vermin destroying
Patent
1991-11-18
1993-07-13
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437208, 437209, 437211, H01L 2128, H01L 2156
Patent
active
052273385
ABSTRACT:
Process for producing a card structure having an internal three-dimensional array of semiconductor chips includes providing a thermal conductor plane, applying a first compliant dielectric material on major surfaces of the thermal conductor plane, forming a two-dimensional array of chip wells in the dielectric material on each side of the thermal conductor plane, positioning and securing semiconductor chips in the chip wells, laminating a lead frame mounted on a carrier sheet over the first compliant dielectric material and the semiconductor chips, forming an electrical connection between each of the semiconductor chips and the lead frame, encapsulating the electrical connections with a filler, laminating an insulating layer and a wiring plane over the encapsulated connections, electrically connecting the lead frame and the wiring plane so as to form a chip core, and electrically connecting a power core to the chip core.
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Hearn Brian E.
International Business Machines - Corporation
Lau Richard
Picardat Kevin M.
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