Method of forming a capacitor

Details Method of forming a capacitor Method of forming a capacitor

1992-04-02

1993-07-13

Thomas, Tom

Fishing, trapping, and vermin destroying

437 47, 437 60, 437192, 437919, H01L 2170

Patent

active

052273253

ABSTRACT:
A method of forming memory cell capacitors without using a buried capacitor contact mask includes the following steps: a) providing an array of electrically insulated word lines atop a semiconductor wafer; b) defining first active regions adjacent the word lines for connection with memory cell capacitors; c) defining second active regions adjacent the word lines for electrical connection with bit lines; d) etching to upwardly expose the first active regions without use of photomasking; e) depositing to a selected thickness a layer of first conductive material atop the wafer to conductively connect with the first active regions, the first conductive material being selectively etchable relative to silicon with silicon being selectively etchable relative to the first conductive material; f) providing a layer of electrically conductive storage node polysilicon atop the layer of first conductive material; g) etching the storage node polysilicon layer selectively relative to the first conductive material to define isolated capacitor storage nodes; h) depositing a layer of capacitor dielectric atop the isolated capacitor storage nodes; i) providing a layer of electrically conductive cell polysilicon atop the capacitor dielectric layer; and j) selectively etching exposed first conductive material from underlying substrate.

REFERENCES:
patent: 4267012 (1981-05-01), Pierce et al.
patent: 4753709 (1988-06-01), Welch et al.
patent: 4784973 (1988-11-01), Stevens et al.
patent: 4970564 (1990-11-01), Kimura et al.
patent: 4981816 (1991-01-01), Kim et al.
patent: 5094965 (1992-03-01), Ozaki et al.

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