Low-inductance power/ground distribution in a package for a semi

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357 70, 357 80, H01L 2348, H01L 2944, H01L 2302

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active

045772142

ABSTRACT:
A package for a semiconductor chip includes as an integral part thereof a frame-shaped multilayer ceramic capacitor. The chip is mounted within the capacitor structure. Conductive portions of the capacitor serve as the terminals and plates of the capacitor and as planar power and ground members for interconnecting an external power supply to the chip. By means of these planar members, power is distributed to the chip in a low-impedance, substantially transient-free manner without utilizing any of the multiple signal leds emanating from the package. Moreover, the signal leads are separated from the ground plane by a low-dielectric-constant material. As a result, the signal leads are minimally loaded and are characterized by a relatively constant impedance selected to optimize signal transfer to and from the chip.

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patent: 3932932 (1976-01-01), Goodman
patent: 3969752 (1976-07-01), Martin et al.
patent: 3999142 (1976-12-01), Presser
patent: 4249196 (1981-02-01), Durney et al.
patent: 4340902 (1982-07-01), Honda et al.

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