Watchdog timer

Electrical pulse counters – pulse dividers – or shift registers: c – Systems – Identifying or correcting improper counter operation

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Details

377 39, 3281291, H03K 2130

Patent

active

045661111

ABSTRACT:
A watchdog timer for monitoring the operation of a computer monitors if the period of a writing signal (W.sub.T) generated by each execution of an instruction of a program is within the predetermined duration. The present watchdog timer comprises a register (2) for storing predetermined DATA upon receipt of the writing signal (W.sub.T), a counter (4) which is incremented by a clock pulse (.phi.), a comparator (3) for providing coincidence output signal when content of the counter reaches said predetermined DATA in the register (2), a first flip-flop (F.sub.1) for storing said coincidence output signal for one period of said clock pulse (.phi.), a second flip-flop (F.sub.2) for storing said coincidence output signal upon receipt of said clock pulse (.phi.), a third flip-flop (F.sub.3) for storing output of said second flip-flop (F.sub.2) upon receipt of said clock pulse (.phi.), an AND circuit (G.sub.1) for providing logical product of reverse output (Q.sub.1) of said first flip-flop (F.sub.1) and said writing signal (W.sub.T), and an OR circuit (G.sub. 2) for receiving an output of said third flip-flop (F.sub.3) and an output of said AND circuit (G.sub.1) and producing an alarm signal NG which indicates an error of a computer to be monitored.

REFERENCES:
patent: 4079234 (1978-03-01), Kashio
patent: 4161649 (1979-07-01), Klos et al.
patent: 4189635 (1980-02-01), Sheller

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