Video display system providing for synchronization of multiple v

Facsimile and static presentation processing – Facsimile – Specific signal processing circuitry

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Details

358160, H04N 514

Patent

active

052413896

ABSTRACT:
A video display system is provided which compensates for video processing delays in multiple, inter-coupled video processing subsystems. The video display system is comprised of multiple video processing subsystems, each having a video bus for coupling video data between individual ones of the multiple subsystems. Each subsystem is adapted to receive one or more video data inputs and to selectively and programmably process the one or more video data inputs to provide a video data output. Each subsystem is comprised of a video delay subsystem coupled to an external video source and to the video bus. The video delay subsystem adds a programmable time delay to its respective external video source input data prior to coupling it to its respective processor for processing of video data contained within that respective video processing subsystem. The programmable delay adequately compensates and time correlates its external video source input and the video bus coupled video input prior to providing those data signals to be selectively processed (blend, fade, mix, etc.) to provide its respective video data output, responsive to control signals received from either the video bus or the main computer bus. The external video source can be any of a number of video sources. Video data output from a first subsystem is coupled via the video bus to one or more other subsystems. The video bus couples video data and control signals amongst the multiple video processing subsystems.

REFERENCES:
patent: 4797740 (1989-01-01), Harasaki et al.
patent: 4858011 (1989-08-01), Jackson et al.
patent: 4942470 (1990-07-01), Nishitani et al.

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