Method of manufacturing a semiconductor package

Details Method of manufacturing a semiconductor package Method of manufacturing a semiconductor package

1996-09-20

1998-07-28

Niebling, John

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Metallic housing or support

438124, 438613, H01L 2160

Patent

active

057862397

ABSTRACT:
According to a method of manufacturing a semiconductor package of the present invention, a plurality of leads and a large number of minute convex portions are respectively formed by plating on a surface of a metal base and in an outer peripheral area of the leads thereon. An insulative film for holding each of the leads is formed. A solder resist film is formed selectively on a portion including the outer peripheral area having the minute convex portions thereon. A projecting electrode is formed on an outer lead portion of each of the leads through an opening of the solder resist film on an outer lead portion of each of the leads. The metal base is selectively removed except a joint portion thereof on an outer periphery to separate the respective leads. Inner lead portions of the leads and a semiconductor chip are jointed together. The joint portion of the metal base is cut off.

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patent: 5559372 (1996-09-01), Kwon
patent: 5633535 (1997-05-01), Chao et al.

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